CD74HC367M96 >
CD74HC367M96
Texas Instruments
IC BUFFER NON-INVERT 6V 16SOIC
3298 Pcs New Original In Stock
Buffer, Non-Inverting 2 Element 2, 4 (Hex) Bit per Element 3-State Output 16-SOIC
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CD74HC367M96 Texas Instruments
5.0 / 5.0 - (362 Ratings)

CD74HC367M96

Product Overview

1234731

DiGi Electronics Part Number

CD74HC367M96-DG

Manufacturer

Texas Instruments
CD74HC367M96

Description

IC BUFFER NON-INVERT 6V 16SOIC

Inventory

3298 Pcs New Original In Stock
Buffer, Non-Inverting 2 Element 2, 4 (Hex) Bit per Element 3-State Output 16-SOIC
CAD Models - PCB Symbols & Footprints
Quantity
Minimum 1

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In Stock (All prices are in USD)
  • QTY Target Price Total Price
  • 1 0.3976 0.3976
  • 10 0.3108 3.1080
  • 30 0.2747 8.2410
  • 100 0.2284 22.8400
  • 500 0.2067 103.3500
  • 1000 0.1952 195.2000
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CD74HC367M96 Technical Specifications

Category Logic, Buffers, Drivers, Receivers, Transceivers

Manufacturer Texas Instruments

Packaging Tape & Reel (TR)

Series 74HC

Product Status Active

Logic Type Buffer, Non-Inverting

Number of Elements 2

Number of Bits per Element 2, 4 (Hex)

Input Type -

Output Type 3-State

Current - Output High, Low 7.8mA, 7.8mA

Voltage - Supply 2V ~ 6V

Operating Temperature -55°C ~ 125°C (TA)

Mounting Type Surface Mount

Package / Case 16-SOIC (0.154", 3.90mm Width)

Supplier Device Package 16-SOIC

Base Product Number 74HC367

Datasheet & Documents

HTML Datasheet

CD74HC367M96-DG

Environmental & Export Classification

RoHS Status ROHS3 Compliant
Moisture Sensitivity Level (MSL) 1 (Unlimited)
REACH Status REACH Unaffected
ECCN EAR99
HTSUS 8542.39.0001

Additional Information

Other Names
296-14523-1
-CD74HC367M96-NDR
296-14523-2
CD74HC367M96E4-DG
296-14523-2-DG
296-CD74HC367M96TR
CD74HC367M96G4-DG
296-14523-6
296-14523-1-DG
-296-14523-1-DG
296-14523-6-DG
296-14523-6-NDR
296-CD74HC367M96DKR
-CD74HC367M96E4-NDR
-CD74HC367M96G4
296-CD74HC367M96CT
-CD74HC367M96E4
-CD74HC367M96G4-NDR
CD74HC367M96E4
CD74HC367M96G4
-296-14523-1
Standard Package
2,500

Alternative Parts

View Details
PART NUMBER
MANUFACTURER
QUANTITY AVAILABLE
DiGi PART NUMBER
UNIT PRICE
SUBSTITUTE TYPE
MC74HC367ADR2G
onsemi
3453
MC74HC367ADR2G-DG
0.1080
Parametric Equivalent
MC74HC367ADG
onsemi
809
MC74HC367ADG-DG
0.1080
Similar
CD74HC367MT
Texas Instruments
2706
CD74HC367MT-DG
0.1080
Parametric Equivalent
CD74HC367M
Texas Instruments
1197
CD74HC367M-DG
0.1080
Direct
74HC367D,653
Nexperia USA Inc.
8164
74HC367D,653-DG
0.1294
MFR Recommended

Reviews

5.0/5.0-(Show up to 5 Ratings)
별***야기
Dec 02, 2025
5.0
믿음이 가는 가격과 만족스러운 후 서비스 덕분에 계속 이용하고 싶어요.
風***ト
Dec 02, 2025
5.0
長い間愛用していますが、品質が変わらず価格も安定しています。
North***Lights
Dec 02, 2025
5.0
Choosing DiGi Electronics is easy thanks to their reasonable prices.
Lumi***sSoul
Dec 02, 2025
5.0
DiGi’s attentive after-sales service demonstrates their genuine commitment to customer success.
Wand***ight
Dec 02, 2025
5.0
They prioritize customer satisfaction through supportive after-sales assistance.
Brig***arbor
Dec 02, 2025
5.0
Shipping is swift, and their support team is extremely helpful and friendly.
Ocea***eeze
Dec 02, 2025
5.0
We have come to rely on their timely deliveries, which are always prompt and secure.
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Frequently Asked Questions (FAQ)

Can the CD74HC367M96 be safely used as a direct replacement for the MC74HC367ADR2G in a 3.3V I²C level-shifting application, and what are the risks if the enable timing isn't synchronized with bus activity?

While the CD74HC367M96 and MC74HC367ADR2G are functionally equivalent and share the same 74HC367 base part number, the CD74HC367M96 from Texas Instruments has stricter propagation delay matching (±3 ns typical) compared to some on-market variants, making it more reliable in time-sensitive I²C level translation. However, using it without synchronizing the output enable (OE) signal with I²C start/stop conditions can cause bus contention or glitches—especially during hot-plug events. To mitigate this, tie OE to a microcontroller GPIO controlled by firmware that only enables the buffer during active transactions, or use a dedicated I²C buffer with built-in direction control like the PCA9306. Always verify timing margins with an oscilloscope on SDA/SCL lines under load.

What are the thermal and layout considerations when using the CD74HC367M96 in a high-density PCB with adjacent power regulators, given its 16-SOIC package and 125°C max junction temperature?

The CD74HC367M96’s 16-SOIC package has limited thermal dissipation due to its modest copper slug and surface-mount construction. In high-density layouts near switching regulators or power-hungry ICs, ambient temperature can easily exceed 85°C, reducing reliability margins. TI specifies a thermal resistance (θJA) of ~100°C/W for this package—meaning even 100mW of dissipation can raise the junction by 10°C. To prevent thermal runaway or premature aging, maintain at least 2mm clearance from heat sources, use thermal relief pads on ground pins, and avoid placing vias directly under the package unless connected to a solid ground plane. If operating above 105°C ambient, consider derating supply voltage to 4.5V max to reduce internal power dissipation.

Is the CD74HC367M96 suitable for driving long backplane traces (over 30 cm) in industrial control systems, and how should output enable control be managed to avoid signal reflections?

The CD74HC367M96 can drive long backplane traces, but its 3-state outputs have moderate slew rates typical of 74HC logic, which can cause ringing on unterminated lines over 30 cm. Without proper termination, signal integrity issues like overshoot or false triggering may occur, especially at 6V operation. Use series termination resistors (22–47Ω) near the output pins to match trace impedance (~50–75Ω typical). Additionally, ensure OE is deasserted during power-up sequencing to prevent bus conflicts. For critical industrial systems, consider adding Schmitt-trigger inputs (e.g., SN74LVC367A) or using a dedicated backplane driver with controlled slew rate. The CD74HC367M96 lacks built-in ESD protection beyond standard HBM, so external TVS diodes on I/O lines are recommended in electrically noisy environments.

How does the CD74HC367M96 compare to the 74HC367D,653 from NXP in terms of long-term availability, moisture sensitivity, and suitability for automotive-grade designs?

The CD74HC367M96 (TI) and 74HC367D,653 (NXP) are pin- and function-compatible, but key differences affect design longevity and compliance. The CD74HC367M96 is MSL 1 (unlimited floor life), simplifying handling in high-volume production, while NXP’s version is typically MSL 2a—requiring dry packing and bake procedures if exposed >24 hours. TI provides full PPAP documentation and AEC-Q100 qualification options for automotive variants, whereas the standard 74HC367D,653 is not automotive-qualified. For automotive or medical applications requiring traceability and long-term supply assurance, the CD74HC367M96 is preferable. However, if your design already uses NXP logic families and doesn’t require MSL 1, the 74HC367D,653 may offer better ecosystem integration. Always verify lifecycle status via manufacturer portals before finalizing BOMs.

What happens if the CD74HC367M96 is operated at 6V supply with all six buffers simultaneously switching high-current loads, and how can shoot-through current be minimized during output enable transitions?

Operating the CD74HC367M96 at 6V with all six buffers driving capacitive or resistive loads near its 7.8mA output limit increases total package power dissipation significantly—potentially exceeding safe operating area if ambient temperature is high. More critically, during OE transitions (enable/disable), brief shoot-through currents can flow through the output stage due to internal gate delay mismatches, causing voltage droops or EMI spikes. To minimize this, add a small dead-time (100–500 ns) in firmware between disabling one buffer and enabling another in daisy-chained systems. Alternatively, use external pull-up/pull-down resistors on outputs to define a known state during high-Z periods. For high-reliability systems, monitor VCC ripple with a scope during enable edges; if overshoot exceeds 10% of VCC, consider adding a 0.1μF ceramic capacitor within 5mm of the supply pin and reducing simultaneous switching activity.

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