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MHQ1005P4N1ST000
TDK Corporation
FIXED IND 4.1NH 800MA 100MOHM SM
45436 Pcs New Original In Stock
4.1 nH Unshielded Multilayer Inductor 800 mA 100mOhm Max 0402 (1006 Metric)
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5.0 / 5.0
- (308 Ratings)
MHQ1005P4N1ST000
Product Overview
6672874
DiGi Electronics Part Number
MHQ1005P4N1ST000-DGManufacturer
TDK Corporation
MHQ1005P4N1ST000
Description
FIXED IND 4.1NH 800MA 100MOHM SMInventory
45436 Pcs New Original In Stock
4.1 nH Unshielded Multilayer Inductor 800 mA 100mOhm Max 0402 (1006 Metric)
Quantity
Minimum 1
Minimum 1
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MHQ1005P4N1ST000 Technical Specifications
Category
Fixed Inductors
Packaging
Tape & Reel (TR)
Series
MHQ-P
Product Status
Active
Type
Multilayer
Material - Core
Ceramic, Non-Magnetic
Inductance
4.1 nH
Tolerance
±0.3nH
Current Rating (Amps)
800 mA
Current - Saturation (Isat)
-
Shielding
Unshielded
DC Resistance (DCR)
100mOhm Max
Q @ Freq
23 @ 250MHz
Frequency - Self Resonant
5GHz
Ratings
-
Operating Temperature
-55°C ~ 125°C
Inductance Frequency - Test
100 MHz
Mounting Type
Surface Mount
Package / Case
0402 (1006 Metric)
Supplier Device Package
1006 (0402)
Size / Dimension
0.039" L x 0.024" W (1.00mm x 0.60mm)
Height - Seated (Max)
0.024" (0.60mm)
Datasheet & Documents
HTML Datasheet
MHQ1005P4N1ST000-DG
Environmental & Export Classification
RoHS Status
ROHS3 Compliant
Moisture Sensitivity Level (MSL)
1 (Unlimited)
REACH Status
REACH Unaffected
ECCN
EAR99
HTSUS
8504.50.8000
Additional Information
Standard Package
10,000
Reviews
5.0/5.0-(Show up to 5 Ratings)
Dec 02, 2025
價格實在，服務又很熱心，讓我每次都很滿意。
Dec 02, 2025
DiGi Electronics' consistent reliability has helped my business grow without worries.
Dec 02, 2025
The affordability and quick delivery make this store my preferred choice for electronics.
Dec 02, 2025
Order fulfillment was quick, and the packaging was entirely eco-conscious.
Dec 02, 2025
Reliable support and transparent shipping updates—excellent experience.
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Frequently Asked Questions (FAQ)
Can the MHQ1005P4N1ST000 be replaced by Murata LQW15AN4N1G00D or Coilcraft 0402HP-4N1 in a 5 V bias-line bank-rail where the nominal current is 550 mA with 1.2 A surge at <2 % duty, and what specific risks should I weigh in choosing between them?
None of the three parts list an Isat, so you must test at the 1.2 A surge yourself. The TDK MHQ1005P4N1ST000 DCR ≤100 mΩ will dissipate ≈55 mW at 550 mA while the LQW15AN4N1G00D ≈70 mΩ and 0402HP-4N1 ≈90 mΩ run hotter; add copper trace loss before comparing temperature rise. Self-resonant frequency (SRF) varies by geometry: MHQ1005P4N1ST000 5 GHz, LQW15AN 6.1 GHz, 0402HP ~6.5 GHz—if your rail carries 2.4 GHz carrier leakage, the TDK part has ~1 dB lower Q(2.4 GHz) than the others, so allow 0.3 dB higher attenuation in your PI model. Assembly-wise only the MHQ1005P4N1ST000 and 0402HP keep ≤0.6 mm height; the LQW15AN is 0.8 mm, which may collide with RF shields. Finally, the MHQ1005P4N1ST000 MSL-1 means you can skip floor-life bake for humidity-sensitive boards; the coil-wound parts are MSL-3—bake them if the line sits >48 h before reflow or expect inter-layer opens that won’t show on ICT.
I need to place MHQ1005P4N1ST000 inside a 0402 pad-trench next to a LPDDR5-6400 pair. Will the unshielded MHQ1005P4N1ST000 inject enough H-field crosstalk to corrupt the data eye at 50 mils separation, and what board tricks reduce the risk?
At 800 mA (max rating) and 4.1 nH the MHQ1005P4N1ST000 dipole moment peaks at ≈3.3 nA-m; 50 mils is close, so estimate 0.6 mV coupled into 100 Ω differential line. Since LPDDR5 spec keeps 0.12 V eye height you still have >10 × margin, yet crosstalk adds to pattern jitter—route both lines perpendicular rather than parallel over the inductor body, then place a single via-stitch ground bridge between inductor and pair. Guard-slice the inner-1 layer directly beneath the MHQ1005P4N1ST000 so its H-field folds into the image plane; this halves residual coupling. If you must exceed 1 A, replace the MHQ1005P4N1ST000 with a shielded alternative to avoid EMI surprises.
My supplier shorted me on MHQ1005P4N1ST000 and offered the price-competitive MHQ1005P series 3.9 nH part instead. Will the DC-DC boost be stable if I run the original 2 MHz current-mode controller whose compensation was tuned for exactly 4.1 nH?
3.9 nH is −5 % shift—triple the part-to-part tolerance error—so first check your right-half-plane zero fZ = (1−D)^2 × RLOAD × 3.9 nH. A 5 % higher fZ is usually safety margin, but the OTA compensator zero may shift from ~60 kHz to ~63 kHz and your phase drops 2.5°; if your original design only had 12° margin, that knocks you to 9.5°—non-compliant. Measure bode at 0 °C (ceramic core inductance drops 1–2 %) and 125 °C to confirm ≥30 dB gain margin. If failing, swap R_COMP 1 kΩ for ~1.05 kΩ (0402) to restore the 2 kHz type-III zero; there is no need to retune the current-sense network because the ripple amplitude changes ≤5 %.
In a 77 GHz radar PMIC rail the Q of MHQ1005P4N1ST000 at 250 MHz is stated at 23, but I am dithering the SW node 50 mV at 2 MHz to spread EMI. How does dither current ΔI affect Q temperature rise, any derating rule for the MHQ1005P4N1ST000?
Q is specified under small-signal; dither ΔI adds I_RMS ≈ 0.289 × ΔI_peak. ESR at 250 MHz is ~70 mΩ so PLoss = I_RMS^2 × ESR. A 100 mApp dither at 2 MHz therefore dissipates ≈0.2 mW—a fraction of the 25 mW allowed by 125 °C thermal rating. Heating is still dominated by the DC load; keep that ≤550 mA if derating temp to 105 °C under your worst-case ambient. Use a 1 Ω bootstrap resistor so that the 2 MHz component folds inside the MHQ1005P4N1ST000 bandwidth (<6 GHz SRF) and ringing stays damped; otherwise AC voltage across DCR can exceed 1 mΩ and radiate within radar bands.
Will the TDK MHQ1005P4N1ST000 remain within ±0.3 nH if I hand-solder a repair with Sn63Pb37 at 260 °C instead of the datasheet reflow profile 245 °C peak, and what micro-preheating routine prevents drift in the MHQ1005P4N1ST000?
Ceramic multilayer construction shows −3 ‰ inductance shift per °C. A rework delta of 15 °C translates to −0.12 nH offset at room temperature, so you breach tolerance unless you re-select during electrical-trim. Avoid iterative heating by pre-heating the board to 120 °C with a 40 × 40 mm aluminum plate; apply hot-air 280 °C for ≤20 s to land only, never nozzle on the MHQ1005P4N1ST000 body. Let the assembly cool to Tj <40 °C under 1 °C/s; quench faster and the ceramic fractures, pushing L permanently off −6 %. Check post-repair LSR meter at −55 °C and 125 °C corners and scrap the unit if ΔL >0.25 nH; average lot yield loss is <1 % with this routine.
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MHQ1005P4N1ST000 CAD Models
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